1. Field of the Invention
This invention relates generally to connections of computer components, and more particularly to connections in computers where one level of electronics is connected to another level, e.g., wherein substrates mounting I.C. chips are connected to printed circuit boards or the like. In even more particular aspects, this invention relates to a novel technique for edge connecting I.C. chip modules to planar boards to provide multiple levels of voltage in addition to ground level to the chips.
2. Description of the Prior Art
As the complexity of I.C. chips and chip packaging increases with continued miniaturization, and the addition of more functions and circuits to the chips and more chips to substrates, there is an increasing demand for packaging and connecting techniques which will allow multiple voltage levels in addition to a ground level or multiple ground levels to be applied to the substrate mounting the chips, while maintaining a compact, high density, efficient, simple and reliable structure, and at the same time provide mechanical support to the package.
One way of providing such an efficient high density structure is often accomplished by arranging the modules mounting the I.C. chips in a stacked array, supporting their edges, and bringing power to the edges of the modules and from the edges to the chips. However, this technique heretofore has not permitted multiple voltages in addition to ground to be applied to the substrate, it having been limited to bringing ground or voltage into one edge and operating voltage to the other edge; e.g. see U.S. Pat. No. 3,812,402 to Garth entitled "High Density Digital Systems with Their Method of Fabrication with Liquid Coating for Semi-Conductor Circuit Chips." This reference depicts a technique for the so-called edge connecting of substrates mounting I.C. chips in which a ground/voltage is introduced at one edge of the substrate and a single power/voltage is introduced at the opposite edge of the substrate. The edge connections also serve to support the substrates on an underlying structure, which can be a panel, or another level of packaging such as a printed circuit board or the like.
While this is an effective way of arraying substrates containing I.C. chips, nevertheless this technique as described is limited to a single ground plane and a single voltage plane, and as described above, the advances in I.C. technology make it desirable and sometimes necessary to have multiple levels of voltage in addition to the ground plane applied to the chips.